IP Description
The IP-DPLL101 provides an ultra-low power and cost-effective fully integrated digital phase-locked loop (PLL) IP optimized for Bluetooth application. This IP contains all the necessary circuits including integrated LDOs to operate standalone directly from main supply voltage. It enables customers to lengthen battery life in their products while offering the lowest silicon cost. The IP- DPLL101 can operate at supply voltage of 1.2–1.5V, offers running from a Zinc-air or single-cell battery. Using two-point modulation, the IP futures Direct FM Modulation with data rate up to 2Mbps.
The IP consists of mainly Digitally Controlled Oscillator (DCO), Divider, Amplitude Detector, high resolution RF Phase Counter, and digital filters and functions. Being highly digitized, makes IP- DPLL101 highly-programmable and it can be configured for many different applications. It also supports a wide range of reference frequencies validated from 13MHz to 52MHz.
IP-DPLL101 is designed in TSMC 28/22nm. DCO fundamental is designed to 4x desired carrier frequency to minimize Power Amplifier to DCO pulling in case a transmitter involved in customer’s SoC. Integration of RF Amplitude Detector has enabled the DCO to operate always at optimum amplitude for phase noise, or a robust reduced amplitude for an even lower power consumption.
The IP is integrated into a customer’s SoC and it has been rigorously tested and validated with successful results. Digital intensive implementation of the IP allows us to port it to a new process/node quickly and with much less risk.
